An apparatus for controlling data access to non-volatile memory is provided, including a micro-controller and at least a memory controller. The micro-controller includes a data/address bus and a plurality of control pins. The micro-controller controls the data access. The memory controller includes a flash memory controller, a FIFO buffer and an error correction unit. The flash memory controller is connected to the control pins and the data/address bus of the micro-controller. The flash memory controller is also connected to the non-volatile memory through a non-volatile memory bus so that the flash memory controller is the data access and control interface between the micro-controller and the non-volatile memory. The FIFO buffer is connected to the micro-controller and the error correction unit to provide the buffering of data access. The error correction unit is connected to the flash memory controller and the non-volatile memory to provide error correction of data access to achieve the object of direct control of data access to the non-volatile memory.