发明申请
- 专利标题: Method of manufacturing printed circuit board for fine circuit formation
- 专利标题(中): 制造精细电路形成印刷电路板的方法
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申请号: US11727587申请日: 2007-03-27
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公开(公告)号: US20070264755A1公开(公告)日: 2007-11-15
- 发明人: Choon Keun Lee , Seung Hyun Ra , Sang Moon Lee , Jung Woo Lee , Jeong Bok Kwak , Jae Choon Cho , Chi Seong Kim
- 申请人: Choon Keun Lee , Seung Hyun Ra , Sang Moon Lee , Jung Woo Lee , Jeong Bok Kwak , Jae Choon Cho , Chi Seong Kim
- 申请人地址: KR Suwon
- 专利权人: SAMSUNG ELECTRO-MECHANICS CO., LTD.
- 当前专利权人: SAMSUNG ELECTRO-MECHANICS CO., LTD.
- 当前专利权人地址: KR Suwon
- 优先权: KR10-2006-0041518 20060509
- 主分类号: H01L21/00
- IPC分类号: H01L21/00
摘要:
Disclosed is a method of manufacturing a printed circuit board for fine circuit formation, in which an unnecessary metal layer formed on the upper portion of a circuit pattern is removed through mechanical polishing and then chemical etching. In place of expensive chemical mechanical polishing, in the method of the invention, mechanical polishing and chemical etching are continuously applied to thus sequentially remove and planarize the unnecessary metal layer. Thereby, through an inexpensive, simple, and continuous process, the planarization procedure can be precisely performed, thus making it possible to apply the method to large areas and economically realize a fine circuit pattern.
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