Invention Application
- Patent Title: Matrix multiply with reduced bandwidth requirements
- Patent Title (中): 矩阵乘以减少带宽要求
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Application No.: US11430324Application Date: 2006-05-08
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Publication No.: US20070271325A1Publication Date: 2007-11-22
- Inventor: Norbert Juffa , John Nickolls
- Applicant: Norbert Juffa , John Nickolls
- Assignee: NVIDIA Corporation
- Current Assignee: NVIDIA Corporation
- Main IPC: G06F7/52
- IPC: G06F7/52

Abstract:
Systems and methods for reducing the bandwidth needed to read the inputs to a matrix multiply operation may improve system performance. Rather than reading a row of a first input matrix and a column of a second input matrix to produce a column of a product matrix, a column of the first input matrix and a single element of the second input matrix are read to produce a column of partial dot products of the product matrix. Therefore, the number of input matrix elements read to produce each product matrix element is reduced from 2N to N+1, where N is the number of elements in a column of the product matrix.
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