发明申请
- 专利标题: Test apparatus and test method
- 专利标题(中): 试验装置及试验方法
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申请号: US11714071申请日: 2007-03-05
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公开(公告)号: US20070277065A1公开(公告)日: 2007-11-29
- 发明人: Shinya Sato
- 申请人: Shinya Sato
- 申请人地址: JP Tokyo
- 专利权人: Advantest Corporation
- 当前专利权人: Advantest Corporation
- 当前专利权人地址: JP Tokyo
- 优先权: JP2004-300782 20041014
- 主分类号: G06F11/00
- IPC分类号: G06F11/00
摘要:
A test apparatus is provided for testing memory under test which stores a data string including an error correction code in the form of additional data. The test apparatus comprises: a logic comparator which compares each of the data sets included in a data string read out from the memory under test with a corresponding anticipated value created beforehand; a data error count unit which counts the number of data sets that do not match the respective anticipated values; and a defect detection unit which provides a function whereby, in a case that the count value counted by the error count unit exceeds a predetermined upper limit number which is equal to or greater than 1, determination is made that the memory under test is defective.
公开/授权文献
- US07930614B2 Test apparatus and test method 公开/授权日:2011-04-19
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