Invention Application
US20070280003A1 Non-volatile semiconductor memory device having different erase pass voltages for respective memory sectors and associated erase method 有权
对于各个存储器扇区具有不同擦除通过电压的非易失性半导体存储器件和相关的擦除方法

  • Patent Title: Non-volatile semiconductor memory device having different erase pass voltages for respective memory sectors and associated erase method
  • Patent Title (中): 对于各个存储器扇区具有不同擦除通过电压的非易失性半导体存储器件和相关的擦除方法
  • Application No.: US11598788
    Application Date: 2006-11-14
  • Publication No.: US20070280003A1
    Publication Date: 2007-12-06
  • Inventor: Jong In ChoiJae Yong Jeong
  • Applicant: Jong In ChoiJae Yong Jeong
  • Priority: KR10-2006-46181 20060523
  • Main IPC: G11C11/34
  • IPC: G11C11/34 G11C16/06 G11C16/04
Non-volatile semiconductor memory device having different erase pass voltages for respective memory sectors and associated erase method
Abstract:
A non-volatile semiconductor memory device comprises a plurality of memory sectors arranged in different memory banks having different bulk regions. The memory cells can be erased using a first mode erase operation, which determines different erase pass voltages for the respective memory sectors by successively increasing a bank voltage applied to each sector until the number of failed cells in each sector falls below a first failed cell threshold value, and a second mode erase operation, which applies the different erase pass voltages to the respective memory sectors for successively increasing periods of time until the number of failed cells in each sector falls below a second failed cell threshold value.
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