Invention Application
US20070283224A1 System and method for efficient uncorrectable error detection in flash memory
有权
闪存中有效的不可校正错误检测的系统和方法
- Patent Title: System and method for efficient uncorrectable error detection in flash memory
- Patent Title (中): 闪存中有效的不可校正错误检测的系统和方法
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Application No.: US11436171Application Date: 2006-05-16
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Publication No.: US20070283224A1Publication Date: 2007-12-06
- Inventor: Wesley A. Kirschner , Robert W. Sisson , John A. Hurd , Gary S. Jacobson
- Applicant: Wesley A. Kirschner , Robert W. Sisson , John A. Hurd , Gary S. Jacobson
- Applicant Address: US CT Stamford
- Assignee: Pitney Bowes Incorporated
- Current Assignee: Pitney Bowes Incorporated
- Current Assignee Address: US CT Stamford
- Main IPC: G11C29/00
- IPC: G11C29/00

Abstract:
A system and method for efficient uncorrectable error detection in flash memory is described. A microcontroller including a non-volatile flash memory utilizes an Error Correction Code (ECC) having a certain error detection and correction bit strength. The user data is first processed by a hash function and hash data is stored with the user data. Then, the user data and hash data are processed by the ECC system. In detection, the hash ensures that a relatively low bit-strength ECC system did not incorrectly manipulate the user data. Such a hash integrity check provides an efficient, robust detection of incorrectly corrected user data resulting from errors beyond the correction but strength of the ECC system utilized.
Public/Granted literature
- US07707481B2 System and method for efficient uncorrectable error detection in flash memory Public/Granted day:2010-04-27
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