发明申请
- 专利标题: Method for controlling heterogeneous multiprocessor and multigrain parallelizing compiler
- 专利标题(中): 用于控制异构多处理器和多线并行编译器的方法
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申请号: US11656531申请日: 2007-01-23
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公开(公告)号: US20070283358A1公开(公告)日: 2007-12-06
- 发明人: Hironori Kasahara , Keiji Kimura , Jun Shirako , Yasutaka Wada , Masaki Ito , Hiroaki Shikano
- 申请人: Hironori Kasahara , Keiji Kimura , Jun Shirako , Yasutaka Wada , Masaki Ito , Hiroaki Shikano
- 优先权: JP2006-157301 20060606
- 主分类号: G06F9/50
- IPC分类号: G06F9/50
摘要:
A heterogeneous multiprocessor system including a plurality of processor elements having mutually different instruction sets and structures avoids a specific processor element from being short of resources to improve throughput. An executable task is extracted based on a preset depending relationship between a plurality of tasks, and the plurality of first processors are allocated to a general-purpose processor group based on a depending relationship among the extracted tasks. A second processor is allocated to an accelerator group, a task to be allocated is determined from the extracted tasks based on a priority value for each of tasks, and an execution cost of executing the determined task by the first processor is compared with an execution cost of executing the task by the second processor. The task is allocated to one of the general-purpose processor group and the accelerator group that is judged to be lower as a result of the cost comparison.