发明申请
US20070288716A1 Memory system with a retiming circuit and a method of exchanging data and timing signals between a memory controller and a memory device
审中-公开
具有重定时电路的存储器系统以及在存储器控制器和存储器件之间交换数据和定时信号的方法
- 专利标题： Memory system with a retiming circuit and a method of exchanging data and timing signals between a memory controller and a memory device
- 专利标题（中）： 具有重定时电路的存储器系统以及在存储器控制器和存储器件之间交换数据和定时信号的方法
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申请号： US11449855申请日： 2006-06-09
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公开(公告)号： US20070288716A1公开(公告)日： 2007-12-13
- 发明人: Edoardo Prete , Anthony Sanders , Maurizio Skerlj , Ulrich Lange
- 申请人： Edoardo Prete , Anthony Sanders , Maurizio Skerlj , Ulrich Lange
- 申请人地址： DE Munchen
- 专利权人： INFINEON TECHNOLOGIES AG
- 当前专利权人： INFINEON TECHNOLOGIES AG
- 当前专利权人地址： DE Munchen
- 主分类号： G06F13/00
- IPC分类号： G06F13/00
摘要：
The present invention refers to a memory system with a controller and a memory device with a communication channel with a data path and a timing path coupling the controller with the memory device. The communication channel has different propagation times for the data path and the timing path exchanging a information signal and a timing signal between the controller and the memory device. The timing signals are used for determining the value of the information signal, and a retiming circuit that is connected with the communication channel compensates, depending on a compensation signal on an input, the delay between the data path and the timing path for exchanging a information signal and a timing signal between the controller and the memory device.
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