发明申请
- 专利标题: INTEGER REPRESENATION OF RELATIVE TIMING BETWEEN DESIRED OUTPUT SAMPLES AND CORRESPONDING INPUT SAMPLES
- 专利标题(中): 所有输出样本和相应输入样本之间相对时间的整体表示
-
申请号: US11558313申请日: 2006-11-09
-
公开(公告)号: US20070290900A1公开(公告)日: 2007-12-20
- 发明人: Song Wang , Eddie L.T. Choy , Samir Kumar Gupta
- 申请人: Song Wang , Eddie L.T. Choy , Samir Kumar Gupta
- 主分类号: H03M7/00
- IPC分类号: H03M7/00
摘要:
In general, this disclosure describes techniques for changing a sampling frequency of a digital signal. In particular, the techniques provide a more accurate way to determining a relative timing between a desired output sample and a corresponding input sample using a non-approximated integer representation of the relative timing. The relative timing between the desired output sample and corresponding input sample may be represented using a first component that identifies a latest input sample of the digital signal used to generate intermediate samples, a second component that identifies an intermediate sample, and a third component that identifies a timing difference between the desired output sample and the intermediate sample. Each of the components may be recursively updated using non-approximated integer values.
公开/授权文献
信息查询