发明申请
- 专利标题: Semiconductor device, a parallel interface system and methods thereof
- 专利标题(中): 半导体器件,并行接口系统及其方法
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申请号: US11812438申请日: 2007-06-19
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公开(公告)号: US20070297552A1公开(公告)日: 2007-12-27
- 发明人: Seung-Jun Bae , Seong-Jin Jang , Beom-Sig Cho
- 申请人: Seung-Jun Bae , Seong-Jin Jang , Beom-Sig Cho
- 专利权人: SAMSUNG ELECTRONICS CO., LTD
- 当前专利权人: SAMSUNG ELECTRONICS CO., LTD
- 优先权: JP10-2006-0056563 20060622
- 主分类号: H04L7/00
- IPC分类号: H04L7/00
摘要:
A semiconductor device, a parallel interface system and methods thereof are provided. The example semiconductor device may include a reference clock transmitting block generating a reference clock signal, a plurality of first transceiver blocks, each of the plurality of first transceiver blocks transmitting at least one parallel data bit signal based on one of a plurality of phase-controlled transmitting sampling clock signals and a per-pin deskew block controlling a phase of a transmitting sampling clock signal to generate the phase-controlled sampling clock signals for the respective plurality of transceiver blocks, the per-pin deskew block controlling the phase of each phase-controlled transmitting sampling clock signal based on a phase skew between a given training data bit signal, among a plurality of training data bit signals, corresponding to a given first transceiver block and the reference clock signal in a first operation mode, and based on phase skew information relating to a phase skew between a given parallel data bit signal of the at least one parallel data bit signal and the reference clock signal in a second operation mode. An example method may include reducing skew based on a comparison between a plurality of transmitted training data bit signals and a corresponding plurality of received training data bit signals in a first mode of operation and reducing skew based on received phase skew information relating to a phase skew difference between a reference signal and a parallel data bit signal in a second mode of operation.