A power interconnection system is provided including a printed circuit board (10), a voltage regulator package (30), and an electrical connection socket (20) adapted for receiving a chip package (40) therein. The electrical socket and the voltage regulator package are mounted and electrically coupled to opposite surfaces of the printed circuit board. Thus, the voltage regulator package and the chip package are held in a substantially opposed relationship relative to the printed circuit board after the chip package is mounted onto the socket. Therefore, with such configuration, a lower impedance connection is achieved between the chip package and the voltage regulator package in comparison with the conventional configuration.