发明申请
US20080020535A1 SILICIDE CAP STRUCTURE AND PROCESS FOR REDUCED STRESS AND IMPROVED GATE SHEET RESISTANCE
审中-公开
减少应力和改进的栅格电阻的硅胶结构和工艺
- 专利标题: SILICIDE CAP STRUCTURE AND PROCESS FOR REDUCED STRESS AND IMPROVED GATE SHEET RESISTANCE
- 专利标题(中): 减少应力和改进的栅格电阻的硅胶结构和工艺
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申请号: US11866751申请日: 2007-10-03
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公开(公告)号: US20080020535A1公开(公告)日: 2008-01-24
- 发明人: Levent Gulari , Kevin Mello , Robert Purtell , Yun-Yu Wang , Keith Wong
- 申请人: Levent Gulari , Kevin Mello , Robert Purtell , Yun-Yu Wang , Keith Wong
- 申请人地址: US NY Armonk
- 专利权人: INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人: INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人地址: US NY Armonk
- 主分类号: H01L21/336
- IPC分类号: H01L21/336 ; H01L21/44
摘要:
A silicide cap structure and method of fabricating a silicide cap having a low sheet resistance. The method provides a semiconductor substrate and a MOSFET structure comprising a gate insulator on the substrate, an Si-containing gate electrode on the gate insulator layer, and source/drain diffusions. Atop the gate electrode and source/drain diffusions is formed a layer of metal used in forming a silicide region atop the transistor gate electrode and diffusions; an intermediate metal barrier layer formed atop the silicide forming metal layer; and, an oxygen barrier layer formed atop the intermediate metal barrier layer. As a result of annealing the MOSFET structure, resulting formed silicide regions exhibit a lower sheet resistance. As the intermediate metal barrier layer comprises a material exhibiting tensile stress, the oxygen barrier layer may comprise a compressive material for minimizing a total mechanical stress of the cap structure and underlying layers during the applied anneal.