Invention Application
- Patent Title: METHOD OF FABRICATING SEMICONDUCTOR DEVICE, AND PLATING APPARATUS
- Patent Title (中): 制造半导体器件的方法和镀膜设备
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Application No.: US11829129Application Date: 2007-07-27
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Publication No.: US20080023335A1Publication Date: 2008-01-31
- Inventor: Koji ARITA , Ryohei KITAO
- Applicant: Koji ARITA , Ryohei KITAO
- Applicant Address: JP Kanagawa
- Assignee: NEC ELECTRONICS CORPORATION
- Current Assignee: NEC ELECTRONICS CORPORATION
- Current Assignee Address: JP Kanagawa
- Priority: JP2006204535 20060727
- Main IPC: C25D7/12
- IPC: C25D7/12 ; C25D17/00 ; C25D21/12 ; C25D5/00

Abstract:
A method of fabricating a semiconductor device of the invention includes a plating process of filling a plurality of recesses provided to an insulating film formed on a substrate with an electro-conductive material, wherein the plating process includes a process step (S104) of performing the plating with a first current density which was obtained by correcting a predetermined first reference current density based on ratio of surface area Sr═S1/S2 of a first surface area S1 over the entire surface of the substrate which includes the area of side walls of the plurality of recesses over the entire surface of the semiconductor substrate, and a second surface area S2 over the entire surface of the substrate which does not include the area of side walls of the plurality of recesses, when fine recesses not larger than a predetermined width, out of all of the plurality of recesses, are filled with the electro-conductive material.
Public/Granted literature
- US08038864B2 Method of fabricating semiconductor device, and plating apparatus Public/Granted day:2011-10-18
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