Invention Application
US20080025500A1 CRYPTOGRAPHIC DEVICE HAVING TAMPER RESISTANCE TO POWER ANALYSIS ATTACK
有权
具有抵抗功率分析攻击的阻尼器的结构设备
- Patent Title: CRYPTOGRAPHIC DEVICE HAVING TAMPER RESISTANCE TO POWER ANALYSIS ATTACK
- Patent Title (中): 具有抵抗功率分析攻击的阻尼器的结构设备
-
Application No.: US11782168Application Date: 2007-07-24
-
Publication No.: US20080025500A1Publication Date: 2008-01-31
- Inventor: Tetsuya Izu , Kouichi Itoh , Masahiko Takenaka
- Applicant: Tetsuya Izu , Kouichi Itoh , Masahiko Takenaka
- Assignee: FUJITSU LIMITED
- Current Assignee: FUJITSU LIMITED
- Main IPC: H04L9/28
- IPC: H04L9/28 ; G06F1/02
Abstract:
A randomly selected point on an elliptic curve is set as the initial value of a variable and calculation including a random point value is performed in an algorithm for calculating arbitrary scalar multiple operation on an elliptic curve when scalar multiplication and addition on an elliptic curve are defined, then a calculation value obtained as a result of including a random point is subtracted from the calculation result, whereby an intended scalar multiple operation value on an elliptic curve is determined.
Public/Granted literature
- US08391477B2 Cryptographic device having tamper resistance to power analysis attack Public/Granted day:2013-03-05
Information query
