A self-calibrating analog-to-digital converter (ADC). The ADC includes multiple component ADCs to generate respective digital representations of an input signal in response to respective timing signals that are offset in phase from one another, each component ADC having a gain setting that controls a magnitude of the digital representations. The ADC further includes correction circuitry to generate a plurality of fast-Fourier transforms (FFTs) that correspond to the digital representations of the input signal and to adjust the gain settings of the component ADCs and/or phase angles of the timing signals based on gain and phase errors indicated by the FFTs.