发明申请
US20080032450A1 Method for fabricating chip-stacked semiconductor package 有权
芯片堆叠半导体封装的制造方法

  • 专利标题: Method for fabricating chip-stacked semiconductor package
  • 专利标题(中): 芯片堆叠半导体封装的制造方法
  • 申请号: US11904744
    申请日: 2007-09-27
  • 公开(公告)号: US20080032450A1
    公开(公告)日: 2008-02-07
  • 发明人: Chien-Ping Huang
  • 申请人: Chien-Ping Huang
  • 优先权: TW094103165 20050202
  • 主分类号: H01L21/00
  • IPC分类号: H01L21/00
Method for fabricating chip-stacked semiconductor package
摘要:
A chip-stacked semiconductor package and a method for fabricating the same are proposed. A chip carrier module plate including a plurality of chip carriers, and a heat sink module plate including a plurality of heat sinks are provided, wherein a plurality of through holes are formed around each of the heat sinks. First chips, the heat sink module plate, and second chips are successively stacked on the chip carrier module plate, wherein the second chips are electrically connected to the chip carrier module plate by conductive wires penetrating the through holes of the heat sink module plate. After a molding process is completed, a singulation process can be performed to separate the chip carriers and the heat sinks, and thus individual semiconductor packages for integrating the heat sinks with the stacked chips are fabricated.
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