发明申请
US20080040569A1 SYSTEM, METHOD AND STORAGE MEDIUM FOR BUS CALIBRATION IN A MEMORY SUBSYSTEM 失效
用于存储器子系统中总线校准的系统,方法和存储介质

SYSTEM, METHOD AND STORAGE MEDIUM FOR BUS CALIBRATION IN A MEMORY SUBSYSTEM
摘要:
A cascaded interconnect system with one or more memory modules, a memory controller and a memory bus that utilizes periodic recalibration. The memory modules and the memory controller are directly interconnected by a packetized multi-transfer interface via the memory bus and provide scrambled data for use in the periodic recalibration.
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