发明申请
- 专利标题： Multi-layer fin wiring interposer fabrication process
- 专利标题（中）： 多层翅片接线插件制造工艺
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申请号： US11890502申请日： 2007-08-07
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公开(公告)号： US20080044950A1公开(公告)日： 2008-02-21
- 发明人: Masahiro Aoyagi , Hiroshi Nakagawa , Kazuhiko Tokoro , Katsuya Kikuchi , Yoshikuni Okada
- 申请人： Masahiro Aoyagi , Hiroshi Nakagawa , Kazuhiko Tokoro , Katsuya Kikuchi , Yoshikuni Okada
- 申请人地址： JP Tokyo
- 专利权人： NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCI & TECH
- 当前专利权人： NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCI & TECH
- 当前专利权人地址： JP Tokyo
- 优先权： JP2003-175743 20030620; JP2003-320295 20030911
- 主分类号： H01L21/00
- IPC分类号： H01L21/00
摘要：
An interposer having multi-layer fine wiring structure which comprises an insulating layer made of photosensitive polyimide which is photosensitive organic material and a wiring layer portion made of metal, such as copper, silver, gold, aluminum, palladium, indium, titanium, tantalum, and niobium, functions as wiring in an integrated circuit chip, wherein junctions between the integrated circuit chip and the interposer are formed by micron to submicron size fine connection metal pads or bumps which are formed on both the integrated circuit chip and the interposer.
公开/授权文献
- US07833835B2 Multi-layer fin wiring interposer fabrication process 公开/授权日：2010-11-16