Invention Application
US20080056558A1 Pattern evaluation method, computer-readable medium, and semiconductor device manufacturing method 有权
模式评估方法,计算机可读介质和半导体器件制造方法

  • Patent Title: Pattern evaluation method, computer-readable medium, and semiconductor device manufacturing method
  • Patent Title (中): 模式评估方法,计算机可读介质和半导体器件制造方法
  • Application No.: US11896043
    Application Date: 2007-08-29
  • Publication No.: US20080056558A1
    Publication Date: 2008-03-06
  • Inventor: Tadashi Mitsui
  • Applicant: Tadashi Mitsui
  • Priority: JP2006-234052 20060830
  • Main IPC: G06K9/00
  • IPC: G06K9/00
Pattern evaluation method, computer-readable medium, and semiconductor device manufacturing method
Abstract:
A pattern evaluation method includes: acquiring a plurality of examination images obtained in regard to an evaluation target pattern, at least one of the plurality of examination images being different from the other examination images; detecting all edges of the evaluation target pattern in each of the examination images; executing alignment of the evaluation target pattern in the respective examination images with a sub-pixel accuracy based on the detected edges; superimposing the aligned pattern edges to generate a single combined edge; measuring the combined edge; and evaluating the evaluation target pattern based on a result of the measurement.
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