A high-voltage semiconductor structure includes a high-voltage well region overlying a substrate, an isolation region extending from a top surface of the high-voltage well region into the high-voltage well region, a low-voltage well region having at least a portion underlying and adjoining the isolation region wherein the low-voltage well region is inside of and of a same conductivity type as the high-voltage well region, a gate dielectric on the high-voltage well region, a gate electrode on the gate dielectric, and a source/drain region of the same conductivity type as the high-voltage well region, wherein the source/drain region is spaced apart from a channel region by the isolation region.