A control circuit includes a plurality of shift register stages. Each shift register stage is capable of outputting an individual output signal. The output signal is utilized to be a driving signal of next shift register stages. Each shift register stage comprises a transistor for receiving a clear signal CLR. The residual charges of the shift register stage can be released when the clear signal CLR is in a high voltage level. The clear signal CLR is enabled during a non-blanking time of a liquid crystal display (LCD). Each current register stage can use an output signal of another shift register stage which is apart from the current shift register stage by a predetermined interval as the clear signal CLR. The clear signal CLR is used to release the residual charges of the shift register stage before the shift register stage outputs its own output signal.