A semiconductor memory device and method thereof are provided. The example semiconductor memory device may include a plurality of comparators receiving output data signals from each of a plurality of sub-array blocks, comparing the output data signals from each of the plurality of sub-array blocks and outputting a plurality of comparison result signals and a test circuit receiving the plurality of comparison result signals from the plurality of comparators, respectively, the test circuit configured to selectively output one of a given one of the plurality of comparison result signals on a given data input/output pad and a given signal obtained by performing a logical operation on at least two of the plurality of comparison result signals on the given data input/output pad in response to a select signal.