发明申请
US20080099845A1 SUB-LITHOGRAPHIC GATE LENGTH TRANSISTOR USING SELF-ASSEMBLING POLYMERS
有权
使用自组装聚合物的次平面栅长度晶体管
- 专利标题： SUB-LITHOGRAPHIC GATE LENGTH TRANSISTOR USING SELF-ASSEMBLING POLYMERS
- 专利标题（中）： 使用自组装聚合物的次平面栅长度晶体管
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申请号： US11552641申请日： 2006-10-25
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公开(公告)号： US20080099845A1公开(公告)日： 2008-05-01
- 发明人: Haining Yang , Wai-Kin Li
- 申请人： Haining Yang , Wai-Kin Li
- 申请人地址： US NY Armonk
- 专利权人： INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人： INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人地址： US NY Armonk
- 主分类号： H01L27/12
- IPC分类号： H01L27/12 ; H01L27/01 ; H01L31/0392 ; H01L21/8238
摘要：
A semiconductor structure including at least one transistor located on a surface of a semiconductor substrate, wherein the at least one transistor has a sub-lithographic channel length, is provided. Also provided is a method to form such a semiconductor structure using self-assembling block copolymer that can be placed at a specific location using a pre-fabricated hard mask pattern.
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