发明申请
US20080133820A1 DDR flash implementation with row buffer interface to legacy flash functions
审中-公开
DDR闪存实现与行缓冲区接口传统的Flash功能
- 专利标题： DDR flash implementation with row buffer interface to legacy flash functions
- 专利标题（中）： DDR闪存实现与行缓冲区接口传统的Flash功能
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申请号： US11607556申请日： 2006-11-30
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公开(公告)号： US20080133820A1公开(公告)日： 2008-06-05
- 发明人: Ramkarthik Ganesan , Saad Monasa , William Low
- 申请人： Ramkarthik Ganesan , Saad Monasa , William Low
- 主分类号： G06F12/00
- IPC分类号： G06F12/00
摘要：
A DDR non-volatile memory providing Double Data Rate (DDR) operation by decoding an address received from an external processor at a DDR interface to provide a command to store data in page buffers. The data received from the external processor at the DDR interface is transferred to page buffers based on the command. A command issued by an internal microcontroller transfers data stored in the page buffers to non-volatile storage.