• 专利标题: Non-Volatile Memory Embedded In A Conventional Logic Process And Methods For Operating Same
  • 申请号: US12021280
    申请日: 2008-01-28
  • 公开(公告)号: US20080137438A1
    公开(公告)日: 2008-06-12
  • 发明人: Gang-feng FangWingyu Leung
  • 申请人: Gang-feng FangWingyu Leung
  • 申请人地址: US CA Sunnyvale
  • 专利权人: MoSys, Inc.
  • 当前专利权人: MoSys, Inc.
  • 当前专利权人地址: US CA Sunnyvale
  • 主分类号: G11C16/04
  • IPC分类号: G11C16/04
Non-Volatile Memory Embedded In A Conventional Logic Process And Methods For Operating Same
摘要:
A non-volatile memory system including an array of cells, each having an access transistor and a capacitor sharing a floating gate. The access transistors in each row are fabricated in separate well regions, which are independently biased. Within each row, the source of each access transistor is coupled to a corresponding virtual ground line, and each capacitor structure is coupled to a corresponding word line. Alternately, the source of each access transistor in a column is coupled to a corresponding virtual ground line. Within each column, the drain of each access transistor is coupled to a corresponding bit line. Select memory cells in each row are programmed by band-to-band tunneling. Bit line biasing prevents programming of non-selected cells of the row. Programming is prevented in non-selected rows by controlling the well region voltages of these rows. Sector erase operations are implemented by Fowler-Nordheim tunneling.
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