发明申请
- 专利标题： Tier-based memory read/write micro-command scheduler
- 专利标题（中）： 基于层次的内存读/写微命令调度程序
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申请号： US11647985申请日： 2006-12-28
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公开(公告)号： US20080162852A1公开(公告)日： 2008-07-03
- 发明人: Surya Kareenahalli , Zohar Bogin
- 申请人： Surya Kareenahalli , Zohar Bogin
- 主分类号： G06F13/00
- IPC分类号： G06F13/00
摘要：
A method, apparatus, and system are described. In one embodiment, the method comprises a chipset receiving a plurality of memory requests, wherein each memory request comprises one or more micro-commands that each require one or more memory clock cycles to execute, and scheduling the execution of each of the micro-commands from more than one of the plurality of memory requests in an order to reduce the number of total memory clock cycles required to complete execution of the more than one memory requests.
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