发明申请
US20080168324A1 Basic Matrix Based on Irregular Ldpc, Codec and Generation Method Thereof 有权
基于不规则Ldpc,编解码器及其生成方法的基本矩阵

  • 专利标题: Basic Matrix Based on Irregular Ldpc, Codec and Generation Method Thereof
  • 专利标题(中): 基于不规则Ldpc,编解码器及其生成方法的基本矩阵
  • 申请号: US11795826
    申请日: 2005-05-13
  • 公开(公告)号: US20080168324A1
    公开(公告)日: 2008-07-10
  • 发明人: Jun XuYuan LiuqingHu Liujun
  • 申请人: Jun XuYuan LiuqingHu Liujun
  • 专利权人: ZTE CORPORATION
  • 当前专利权人: ZTE CORPORATION
  • 优先权: CN200510007156.3 20050123
  • 国际申请: PCT/CN2005/000671 WO 20050513
  • 主分类号: H04M13/00
  • IPC分类号: H04M13/00
Basic Matrix Based on Irregular Ldpc, Codec and Generation Method Thereof
摘要:
Basic matrix based on irregular LDPC codes, codec and generation method thereof. The codec includes an encoding/decoding operation module and a basic matrix storage module. In the stored basic matrix Hb, for all girths with length of 4, any element of i, j, k or l constituting the girths in anti-clockwise or clockwise always satisfies inequality: mod(i−j+k−l, z)≠0, wherein z is the extension factor. When generating the basic matrix, firstly the number of rows M, number of columns N, and weight vectors of the rows and columns are determined, an irregularly original basic matrix is constructed; then the position of ‘1’ is filled by a value chosen from set {0, 1, 2, . . . , z−1} to obtain the basic matrix Hb, which is made to satisfy the above-mentioned inequality. The basic matrix Hb obtained by storing, which is configured with corresponding encoding/decoding operation module, constitutes the desired encoder/decoder. The encoder/decoder according to the present invention can effectively eliminate error-floor phenomenon of LDPC codes and accelerate the falling speed of BER curve.
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