发明申请
US20080199975A1 METHODS OF FORMING A METAL OXIDE LAYER PATTERN HAVING A DECREASED LINE WIDTH OF A PORTION THEREOF AND METHODS OF MANUFACTURING A SEMICONDUCTOR DEVICE USING THE SAME
审中-公开
形成具有其部分的下降线宽度的金属氧化物层图案的方法和使用其制造半导体器件的方法
- 专利标题: METHODS OF FORMING A METAL OXIDE LAYER PATTERN HAVING A DECREASED LINE WIDTH OF A PORTION THEREOF AND METHODS OF MANUFACTURING A SEMICONDUCTOR DEVICE USING THE SAME
- 专利标题(中): 形成具有其部分的下降线宽度的金属氧化物层图案的方法和使用其制造半导体器件的方法
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申请号: US12032018申请日: 2008-02-15
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公开(公告)号: US20080199975A1公开(公告)日: 2008-08-21
- 发明人: Min-Joon Park , Chang-Jin Kang , Dong-Hyun Kim
- 申请人: Min-Joon Park , Chang-Jin Kang , Dong-Hyun Kim
- 专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人: Samsung Electronics Co., Ltd.
- 优先权: KR2007-0015742 20070215
- 主分类号: H01L21/18
- IPC分类号: H01L21/18 ; H01L21/3065
摘要:
Provided herein are methods of forming a metal oxide layer pattern on a substrate including providing a preliminary metal oxide layer on a substrate; etching the preliminary metal oxide layer to provide a preliminary metal oxide layer pattern, wherein the line width of the preliminary metal oxide layer pattern gradually increases in a vertically downward direction; and etching the preliminary metal oxide layer pattern to form a metal oxide layer pattern in a manner so as to decrease the line width of a lower portion of the preliminary metal oxide layer. The present invention also provides methods of manufacturing a semiconductor device including forming a metal oxide layer and a first conductive layer on a substrate; etching the metal oxide layer to provide a preliminary metal oxide layer pattern, wherein the line width of the preliminary metal oxide layer pattern gradually increase in a vertically downward direction; etching the first conductive layer to provide a first conductive layer pattern; and etching the preliminary metal oxide layer pattern to provide a metal oxide layer pattern in a manner so as to decrease the line width of a lower portion of the preliminary metal oxide layer pattern.
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