发明申请
- 专利标题： PROCESSOR WITH RECONFIGURABLE FLOATING POINT UNIT
- 专利标题（中）： 具有可重构浮动点单元的处理器
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申请号： US11680331申请日： 2007-02-28
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公开(公告)号： US20080209184A1公开(公告)日： 2008-08-28
- 发明人: Ashraf Ahmed , Kelvin Domnic Goveas , Michael Clark , Jelena Ilic
- 申请人： Ashraf Ahmed , Kelvin Domnic Goveas , Michael Clark , Jelena Ilic
- 申请人地址： US CA Sunnyvale
- 专利权人： ADVANCED MICRO DEVICES, INC.
- 当前专利权人： ADVANCED MICRO DEVICES, INC.
- 当前专利权人地址： US CA Sunnyvale
- 主分类号： G06F9/00
- IPC分类号： G06F9/00
摘要：
A technique of operating a processor includes determining whether a floating point unit (FPU) of the processor is to operate in a full-bit mode or a reduced-bit mode. An instruction is fetched and the instruction is decoded into a single operation, when the full-bit mode is indicated, or multiple operations, when the reduced-bit mode is indicated.
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