发明申请
- 专利标题： Processor with reconfigurable floating point unit
- 专利标题（中）： 具有可重构浮点单元的处理器
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申请号： US11756166申请日： 2007-05-31
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公开(公告)号： US20080209185A1公开(公告)日： 2008-08-28
- 发明人: Ashraf Ahmed , Kelvin Domnic Goveas , Michael Clark , Jelena Ilic
- 申请人： Ashraf Ahmed , Kelvin Domnic Goveas , Michael Clark , Jelena Ilic
- 申请人地址： US CA Sunnyvale
- 专利权人： ADVANCED MICRO DEVICES, INC.
- 当前专利权人： ADVANCED MICRO DEVICES, INC.
- 当前专利权人地址： US CA Sunnyvale
- 主分类号： G06F7/38
- IPC分类号： G06F7/38
摘要：
A technique of operating a processor includes determining whether a floating point unit (FPU) of the processor is to operate in a full-bit mode or a reduced-bit mode. An instruction is fetched and the instruction is decoded into one or more full-bit operations, when the full-bit mode is indicated, or one or more reduced-bit operations, when the reduced-bit mode is indicated.
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