Invention Application
US20080222396A1 Low Overhead Access to Shared On-Chip Hardware Accelerator With Memory-Based Interfaces
有权
具有基于内存接口的共享片上硬件加速器的低架构访问
- Patent Title: Low Overhead Access to Shared On-Chip Hardware Accelerator With Memory-Based Interfaces
- Patent Title (中): 具有基于内存接口的共享片上硬件加速器的低架构访问
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Application No.: US11684348Application Date: 2007-03-09
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Publication No.: US20080222396A1Publication Date: 2008-09-11
- Inventor: Lawrence A. Spracklen , Adam R. Talcott , Santosh G. Abraham , Sothea Soun , Sanjay Patel , Farnad Sajjadian
- Applicant: Lawrence A. Spracklen , Adam R. Talcott , Santosh G. Abraham , Sothea Soun , Sanjay Patel , Farnad Sajjadian
- Main IPC: G06F9/50
- IPC: G06F9/50
Abstract:
In one embodiment, a method is contemplated. Access to a hardware accelerator is requested by a user-privileged thread. Access to the hardware accelerator is granted to the user-privileged thread by a higher-privileged thread responsive to the requesting. One or more commands are communicated to the hardware accelerator by the user-privileged thread without intervention by higher-privileged threads and responsive to the grant of access. The one or more commands cause the hardware accelerator to perform one or more tasks. Computer readable media comprises instructions which, when executed, implement portions of the method are also contemplated in various embodiments, as is a hardware accelerator and a processor coupled to the hardware accelerator.
Public/Granted literature
- US07809895B2 Low overhead access to shared on-chip hardware accelerator with memory-based interfaces Public/Granted day:2010-10-05
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