发明申请
- 专利标题： Network based integrated circuit testline generator
- 专利标题（中）： 基于网络的集成电路测试线发生器
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申请号： US11731036申请日： 2007-03-30
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公开(公告)号： US20080244475A1公开(公告)日： 2008-10-02
- 发明人: Tseng Chin Lo , Kuo Tsai Li , Shien-Yang Wu
- 申请人： Tseng Chin Lo , Kuo Tsai Li , Shien-Yang Wu
- 主分类号： G06F17/50
- IPC分类号： G06F17/50
摘要：
A network based integrated circuit testline generating system and method of using the same is described. The system includes a user interface for generating and submitting requests which specify types and configurations of needed testlines for device parametric test. A testline generator receives the requests and creates a layout data base which includes layout information of needed testlines.
公开/授权文献
- US2161434A Hat-brim flanging machine 公开/授权日：1939-06-06
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