发明申请
US20080268596A1 Methods Of Fabricating Non-Volatile Memory With Integrated Select And Peripheral Circuitry And Post-Isolation Memory Cell Formation
有权
使用集成选择和外围电路和后隔离存储器单元形成的非易失性存储器的制造方法
- 专利标题: Methods Of Fabricating Non-Volatile Memory With Integrated Select And Peripheral Circuitry And Post-Isolation Memory Cell Formation
- 专利标题(中): 使用集成选择和外围电路和后隔离存储器单元形成的非易失性存储器的制造方法
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申请号: US12061642申请日: 2008-04-02
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公开(公告)号: US20080268596A1公开(公告)日: 2008-10-30
- 发明人: Tuan Pham , Takashi Orimoto , Masaaki Higashitani , James Kai , George Matamis
- 申请人: Tuan Pham , Takashi Orimoto , Masaaki Higashitani , James Kai , George Matamis
- 主分类号: H01L21/336
- IPC分类号: H01L21/336
摘要:
Non-volatile semiconductor memory devices with dual control gate memory cells and methods of forming the same using integrated select and peripheral circuitry formation are provided. Strips of charge storage material elongated in a column direction across the surface of a substrate with strips of tunnel dielectric material therebetween are formed. The strips of charge storage material can include multiple layers of charge storage material to form composite charge storage structures in one embodiment. After forming isolation trenches in the substrate between active areas below the strips of charge storage material, spacer-assisted patterning is used to form a pattern at the memory array region. Strips of photoresist are patterned over a portion of the pattern at the memory array. Photoresist is also applied at the peripheral circuitry region. At least a portion of the layer stack is etched using the photoresist as a mask before removing the photoresist and etching the strips of charge storage material to form the charge storage structures.
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