发明申请
- 专利标题: Semiconductor chip package
- 专利标题(中): 半导体芯片封装
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申请号: US12155867申请日: 2008-06-11
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公开(公告)号: US20080303120A1公开(公告)日: 2008-12-11
- 发明人: Tae Soo Lee , Yun Hwi Park
- 申请人: Tae Soo Lee , Yun Hwi Park
- 专利权人: SAMSUNG ELECTRO-MECHANICS CO., LTD.
- 当前专利权人: SAMSUNG ELECTRO-MECHANICS CO., LTD.
- 优先权: KR10-2007-0056852 20070611
- 主分类号: H01L23/552
- IPC分类号: H01L23/552
摘要:
A semiconductor chip package includes a main board; a ceramic substrate having a cavity within which at least one chip is electrically mounted, the cavity being placed at a lower portion of the ceramic substrate facing the main board; and a conductive shielding layer provided with a predetermined thickness on the outside of the ceramic substrate. The ceramic substrate includes: at least one first ground line electrically connecting the conductive shielding layer with the main board; at least one second ground line electrically connecting the conductive shielding layer with the chip; and at least one signal line electrically connecting the chip with the main board. Thus, manufacturing costs are lowered because of the reduced number of components being used, miniaturization in device design can be achieved because of the small volume of the package, and the ground performance can be improved.
公开/授权文献
- US07745911B2 Semiconductor chip package 公开/授权日:2010-06-29