Invention Application
- Patent Title: METHOD FOR FORMING CIRCUIT PATTERN
- Patent Title (中): 形成电路图的方法
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Application No.: US12198540Application Date: 2008-08-26
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Publication No.: US20080305425A1Publication Date: 2008-12-11
- Inventor: Akihiko Kamada , Norio Sakai , Issei Yamamoto
- Applicant: Akihiko Kamada , Norio Sakai , Issei Yamamoto
- Priority: JP2006-051347 20060227
- Main IPC: G03G13/20
- IPC: G03G13/20

Abstract:
A method for forming circuit patterns having different resistances. The method includes (1) a first step of forming a first toner image using a first toner and a second toner image using a second toner, each by electrophotography, the first toner containing a resistive material, the second toner having a resistance different from that of the first toner; and (2) a second step of transferring and fixing the first toner image and the second toner image to an object to be printed such as a ceramic green sheet, to form a circuit pattern.
Public/Granted literature
- US07736830B2 Method for forming circuit pattern Public/Granted day:2010-06-15
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