发明申请
- 专利标题： Phase Change Memory Cell with Vertical Transistor
- 专利标题（中）： 具有垂直晶体管的相变存储单元
-
申请号： US11771457申请日： 2007-06-29
-
公开(公告)号： US20090001337A1公开(公告)日： 2009-01-01
- 发明人: Toshiharu Furukawa , John G. Gaudiello , Mark Charles Hakey , Steven J. Holmes , David V. Horak , Charles William Koburger, III , Chung Hon Lam
- 申请人： Toshiharu Furukawa , John G. Gaudiello , Mark Charles Hakey , Steven J. Holmes , David V. Horak , Charles William Koburger, III , Chung Hon Lam
- 主分类号： H01L21/336
- IPC分类号： H01L21/336 ; H01L21/06 ; H01L29/02
摘要：
A memory cell in an integrated circuit is fabricated in part by forming a lower electrode feature, an island, a sacrificial feature, a gate feature, and a phase change feature. The island is formed on the lower electrode feature and has one or more sidewalls. It comprises a lower doped feature, a middle doped feature formed above the lower doped feature, and an upper doped feature formed above the middle doped feature. The sacrificial feature is formed above the island, while the gate feature is formed along each sidewall of the island. The gate feature overlies at least a portion of the middle doped feature of the island and is operative to control an electrical resistance therein. Finally, the phase feature is formed above the island at least in part by replacing at least a portion of the sacrificial feature with a phase change material. The phase change material is operative to switch between lower and higher electrical resistance states in response to an application of an electrical signal.
公开/授权文献
- US07932167B2 Phase change memory cell with vertical transistor 公开/授权日：2011-04-26