发明申请
- 专利标题: Digital PWM Amplifier Having a Low Delay Corrector
- 专利标题(中): 具有低延迟校正器的数字PWM放大器
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申请号: US11782708申请日: 2007-07-25
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公开(公告)号: US20090027118A1公开(公告)日: 2009-01-29
- 发明人: Jack B. Andersen , Peter Craven , Michael A. Kost , Daniel L.W. Chieng , Larry E. Hand , Wilson E. Taylor
- 申请人: Jack B. Andersen , Peter Craven , Michael A. Kost , Daniel L.W. Chieng , Larry E. Hand , Wilson E. Taylor
- 主分类号: H03F3/38
- IPC分类号: H03F3/38 ; H03G3/10
摘要:
Systems and methods for performance improvements in digital switching amplifiers using a low delay corrector. In one embodiment, a digital pulse width modulation (PWM) amplifier includes a signal processing plant configured to receive and process an input audio signal. The amplifier also includes a low delay corrector configured to receive signals output by the plant. The output of the low delay corrector is added to the input audio signal as feedback. The plant may consist of a modulator and power switch, a noise shaper, or any other type of plant. An analog-to-digital converter (ADC) may be provided to convert the output audio signal to a digital signal. Filtering may be implemented before or after the ADC, and a decimator may be placed after the ADC if it is an oversampling ADC.
公开/授权文献
- US07576606B2 Digital PWM amplifier having a low delay corrector 公开/授权日:2009-08-18
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