发明申请
- 专利标题: METHOD AND SYSTEM FOR ANALYZING AN INTEGRATED CIRCUIT BASED ON SAMPLE WINDOWS SELECTED USING AN OPEN DETERMINISTIC SEQUENCING TECHNIQUE
- 专利标题(中): 基于使用开放式确定性测序技术选择的样本窗口分析集成电路的方法和系统
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申请号: US11828728申请日: 2007-07-26
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公开(公告)号: US20090031263A1公开(公告)日: 2009-01-29
- 发明人: Sarah C. Braasch , Jason D. Hibbeler , Rouwaida N. Kanj , Daniel N. Maynard , Sani R. Nassif , Evanthia Papadopoulou
- 申请人: Sarah C. Braasch , Jason D. Hibbeler , Rouwaida N. Kanj , Daniel N. Maynard , Sani R. Nassif , Evanthia Papadopoulou
- 主分类号: G06F17/50
- IPC分类号: G06F17/50
摘要:
Disclosed herein are embodiments of a system and an associated method for analyzing an integrated circuit to determine the value of a particular attribute (i.e., a physical or electrical property) in that integrated circuit. In the embodiments, an open deterministic sequencing technique is used to select a sequence of points representing centers of sample windows in an integrated circuit layout. Then, the value of the particular attribute is determined for each sample window and the results are accumulated in order to infer an overall value for that particular attribute for the entire integrated circuit layout. This sequencing technique has the advantage of allowing additional sample windows to be added and/or the sizes and shapes of the windows to be varied without hindering the quality of the sample.