发明申请
- 专利标题: CAVLC run before encode with zero cycle costs
- 专利标题(中): CAVLC在零周期成本编码之前运行
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申请号: US12058343申请日: 2008-03-28
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公开(公告)号: US20090034611A1公开(公告)日: 2009-02-05
- 发明人: Scott F. James , Eric C. Pearson
- 申请人: Scott F. James , Eric C. Pearson
- 主分类号: H04N7/26
- IPC分类号: H04N7/26
摘要:
An apparatus including a control circuit and an encoder circuit. The control circuit may configured to generate a first control signal and a second control signal. The encoder circuit may be configured to (i) receive a plurality of coefficients, the first control signal and the second control signal and (ii) generate an encoded signal in response to the plurality of coefficients, the first control signal and the second control signal. The encoder circuit may be further configured to simultaneously encode run before syntax elements with the plurality of coefficients.
公开/授权文献
- US08135072B2 CAVLC run before encode with zero cycle costs 公开/授权日:2012-03-13