发明申请
US20090050976A1 PROCESS METHOD TO FULLY SALICIDE (FUSI) BOTH N-POLY AND P-POLY ON A CMOS FLOW
有权
在CMOS流程上充分浸出（FUSI）N-POLY和P-POLY的方法
- 专利标题： PROCESS METHOD TO FULLY SALICIDE (FUSI) BOTH N-POLY AND P-POLY ON A CMOS FLOW
- 专利标题（中）： 在CMOS流程上充分浸出（FUSI）N-POLY和P-POLY的方法
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申请号： US11844832申请日： 2007-08-24
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公开(公告)号： US20090050976A1公开(公告)日： 2009-02-26
- 发明人: Freidoon Mehrad , Frank S. Johnson
- 申请人： Freidoon Mehrad , Frank S. Johnson
- 主分类号： H01L21/3205
- IPC分类号： H01L21/3205 ; H01L29/78
摘要：
An improved method of forming a fully silicided (FUSI) gate in both NMOS and PMOS transistors of the same MOS device is disclosed. In one example, the method comprises forming a first silicide in at least a top portion of a gate electrode of the PMOS devices and not over the NMOS devices. The method further comprises concurrently forming a second silicide in at least a top portion of a gate electrode of both the NMOS and PMOS devices, and forming a FUSI gate silicide of the gate electrodes. In one embodiment, the thickness of the second silicide is greater than the first silicide by an amount which compensates for a difference in the rates of silicide formation between the NMOS and PMOS devices.
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