A circuit board (10) for reducing a variation in impedance of signal traces thereon includes a first signal plane (30) and a second signal plane (50). The first signal plane includes a first signal trace (31) arranged thereon. The first signal trace has a first width. The second signal plane includes a plurality of second signal traces (51) arranged thereon. An orthographic projection of the first signal trace onto the second signal plane crosses the second signal traces. A width of the first signal trace at positions where the orthographic projection thereof onto the second signal plane at the intersections with the second signal traces transitions to a second width less than the first width of the first signal trace.