Invention Application
- Patent Title: STACK-TYPE SEMICONDUCTOR PACKAGE
- Patent Title (中): 堆叠型半导体封装
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Application No.: US12244591Application Date: 2008-10-02
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Publication No.: US20090085224A1Publication Date: 2009-04-02
- Inventor: Ju-Il CHOI , Hyun-Soo CHUNG , In-Young LEE , Ho-Jin LEE , Son-Kwan HWANG
- Applicant: Ju-Il CHOI , Hyun-Soo CHUNG , In-Young LEE , Ho-Jin LEE , Son-Kwan HWANG
- Applicant Address: KR Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Gyeonggi-do
- Priority: KR2007-0099243 20071002
- Main IPC: H01L23/538
- IPC: H01L23/538 ; H01L21/58

Abstract:
Provided is a stack-type semiconductor package including a base chip having a circuit formed on one of its surfaces, at least one stack chip having a circuit stacked on the base chip, an adhesive interposed between the base chip and the stack chip, and signal transmission members formed along a lateral surface of the stack chip. The fabrication process of this stack-type semiconductor package may be simplified and the number of process operations may be lessened, thereby reducing the production time and cost. Also, a state of electrical contact of a terminal with a signal transmission member may be solidified, thereby improving the reliability of the stack-type semiconductor package. Furthermore, new post-type signal transmission members are adopted instead of wires or electrodes so that the structural stability and productivity of the stack-type semiconductor package may be markedly enhanced.
Information query
IPC分类: