发明申请
US20090092184A1 POWER SAVING DECODER ARCHITECTURE 有权
节电解码器架构

POWER SAVING DECODER ARCHITECTURE
摘要:
A method and system are provided for decoding coded video data by turning off or not loading at least one functional unit or functional subunit of the decoder while decoding a portion of the coded video data. A schedule may be created prior to substantive decoding and then the schedule may be used to decode coded video data. The coded video data may be reordered based on the functional units or subunits the portions of the coded video data need for decoding. The portions of the coded video data are reordered into their original order in an output buffer after being decoded. The decoder may determine which functional units or subunits are needed for decoding based on administration information included with the coded video data. The decoder may decode portions of the coded video data in parallel.
公开/授权文献
信息查询
0/0