发明申请
- 专利标题： NOVEL METHOD FOR FOUR DIRECTION LOW CAPACITANCE ESD PROTECTION
- 专利标题（中）： 四方向低电容ESD保护的新方法
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申请号： US12342294申请日： 2008-12-23
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公开(公告)号： US20090101937A1公开(公告)日： 2009-04-23
- 发明人: Jian-Hsing Lee , Shui-Hunyi Chen
- 申请人： Jian-Hsing Lee , Shui-Hunyi Chen
- 申请人地址： TW Hsin-Chu
- 专利权人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- 当前专利权人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- 当前专利权人地址： TW Hsin-Chu
- 主分类号： H01L29/73
- IPC分类号： H01L29/73
摘要：
The invention describes a structure and a process for providing ESD semiconductor protection with reduced input capacitance. The structure consists of heavily doped P+ guard rings surrounding the I/O ESD protection device and the Vcc to Bss protection device. In addition, there is a heavily doped N+ guard ring surrounding the I/O protection device its P+ guard ring. The guard rings enhance structure diode elements providing enhanced ESD energy discharge path capability enabling the elimination of a specific conventional Vss to I/O pad ESD protection device. This reduces the capacitance seen by the I/O circuit while still providing adequate ESD protection for the active circuit devices.
公开/授权文献
- US07910999B2 Method for four direction low capacitance ESD protection 公开/授权日：2011-03-22
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