发明申请
- 专利标题： MEMORY DEVICES WITH SPLIT GATE AND BLOCKING LAYER
- 专利标题（中）： 具有分离门和阻塞层的存储器件
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申请号： US11876557申请日： 2007-10-22
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公开(公告)号： US20090101961A1公开(公告)日： 2009-04-23
- 发明人: Yue-Song He , Len Mei
- 申请人： Yue-Song He , Len Mei
- 主分类号： H01L29/788
- IPC分类号： H01L29/788 ; H01L21/336
摘要：
The present disclosure provides a memory device having a cell stack and a select gate formed adjacent to the cell stack. The cell stack includes a tunneling dielectric layer, a charge storage layer, a blocking dielectric layer, a tantalum-nitride layer, and a control gate layer. When a positive bias is applied to the control gate and the select gate, negative charges are injected from a channel region of a substrate through the tunneling dielectric layer and into the charge storage layer to thereby store the negative charges in the charge storage layer. When a negative bias is applied to the control gate, negative charges are tunneled from the charge storage layer to the channel region of the substrate through the tunneling dielectric layer.
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