发明申请
- 专利标题: HIGH YIELD, HIGH DENSITY ON-CHIP CAPACITOR DESIGN
- 专利标题(中): 高密度片上电容设计
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申请号: US12371756申请日: 2009-02-16
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公开(公告)号: US20090152612A1公开(公告)日: 2009-06-18
- 发明人: Jonghae Kim , Moon J. Kim , Jean-Olivier Plouchart , Robert E. Trzcinski
- 申请人: Jonghae Kim , Moon J. Kim , Jean-Olivier Plouchart , Robert E. Trzcinski
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 主分类号: H01L29/94
- IPC分类号: H01L29/94
摘要:
A capacitance circuit assembly mounted on a semiconductor chip, and methods for forming the same, are provided. A plurality of divergent capacitors is provided in a parallel circuit connection between first and second ports, the plurality providing at least one Metal Oxide Silicon Capacitor and at least one Vertical Native Capacitor or Metal-Insulator-Metal Capacitor. An assembly has a vertical orientation, a Metal Oxide Silicon capacitor located at the bottom and defining a footprint, with a middle Vertical Native Capacitor having a plurality of horizontal metal layers, including a plurality of parallel positive plates alternating with a plurality of parallel negative plates. In another aspect, vertically asymmetric orientations provide a reduced total parasitic capacitance.
公开/授权文献
- US07859825B2 High yield, high density on-chip capacitor design 公开/授权日:2010-12-28