发明申请
US20090152683A1 ROUNDED DIE CONFIGURATION FOR STRESS MINIMIZATION AND ENHANCED THERMO-MECHANICAL RELIABILITY
审中-公开
用于应力最小化和增强的机械可靠性的圆形配置
- 专利标题: ROUNDED DIE CONFIGURATION FOR STRESS MINIMIZATION AND ENHANCED THERMO-MECHANICAL RELIABILITY
- 专利标题(中): 用于应力最小化和增强的机械可靠性的圆形配置
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申请号: US11959422申请日: 2007-12-18
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公开(公告)号: US20090152683A1公开(公告)日: 2009-06-18
- 发明人: Luu T. Nguyen , Vijaylaxmi Gumaste
- 申请人: Luu T. Nguyen , Vijaylaxmi Gumaste
- 申请人地址: US CA Santa Clara
- 专利权人: NATIONAL SEMICONDUCTOR CORPORATION
- 当前专利权人: NATIONAL SEMICONDUCTOR CORPORATION
- 当前专利权人地址: US CA Santa Clara
- 主分类号: H01L29/06
- IPC分类号: H01L29/06 ; H01L21/304 ; H01L23/495
摘要:
One aspect of the invention pertains to a semiconductor die with rounded sidewall junction edge corners. Such rounding reduces stress accumulations at those corners. In other embodiments of the invention, the sharpness of other corners and edges in the die are reduced. For example, reducing the sharpness of the bottom edge corners formed by the intersection of a sidewall and the back surface of a die can further diminish stress accumulations. One embodiment pertains to a wafer carried on a wafer support, where the wafer includes a multiplicity of such dice. Another embodiment involves a semiconductor package containing such dice. Methods of fabricating the dice are also described.
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