发明申请
- 专利标题: System and Method for Cache Line Replacement Selection in a Multiprocessor Environment
- 专利标题(中): 多处理器环境中缓存线替换选择的系统和方法
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申请号: US11959804申请日: 2007-12-19
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公开(公告)号: US20090164736A1公开(公告)日: 2009-06-25
- 发明人: Robert John Dorsey , Jason Alan Cox , Hien Minh Le , Richard Nicholas , Eric Francis Robinson , Thuong Quang Truong
- 申请人: Robert John Dorsey , Jason Alan Cox , Hien Minh Le , Richard Nicholas , Eric Francis Robinson , Thuong Quang Truong
- 主分类号: G06F12/08
- IPC分类号: G06F12/08
摘要:
A method for managing a cache operates in a data processing system with a system memory and a plurality of processing units (PUs). A first PU determines that one of a plurality of cache lines in a first cache of the first PU must be replaced with a first data block, and determines whether the first data block is a victim cache line from another one of the plurality of PUs. In the event the first data block is not a victim cache line from another one of the plurality of PUs, the first cache does not contain a cache line in coherency state invalid, and the first cache contains a cache line in coherency state moved, the first PU selects a cache line in coherency state moved, stores the first data block in the selected cache line and updates the coherency state of the first data block.
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