发明申请
- 专利标题: Techniques for Device Fabrication with Self-Aligned Electrodes
- 专利标题(中): 用于自对准电极的器件制造技术
-
申请号: US12225619申请日: 2007-03-28
-
公开(公告)号: US20090166612A1公开(公告)日: 2009-07-02
- 发明人: Paul A. Cain , Yong-Young Noh , Henning Sirringhaus
- 申请人: Paul A. Cain , Yong-Young Noh , Henning Sirringhaus
- 优先权: GB0606257.4 20060329; GB0606258.2 20060329; GB0606773.0 20060405; GB0624382.8 20061206; GB0624383.6 20061206
- 国际申请: PCT/GB2007/050160 WO 20070328
- 主分类号: H01L51/00
- IPC分类号: H01L51/00 ; H01L29/78 ; H01L21/336 ; H01L51/30
摘要:
This invention relates to the fabrication of electronic devices, such as thin-film transistors, in particular thin-film transistors in which patterning techniques are used for definition of electrode patterns that need to be accurately aligned with respect to underlying electrodes. The fabrication technique is applicable to various patterning techniques, such as laser ablation patterning or solution-based, direct-write printing techniques which are not capable of forming structures with a small linewidth, and/or that cannot be positioned very accurately with respect to previously deposited patterns. We thus describe self-aligned gate techniques which are applicable for both gate patterning by a subtractive technique, in particular selective laser ablation patterning, and gate patterning by an additive technique such as printing. The techniques facilitate the use of low-resolution gate patterning.