发明申请
US20090174372A1 Analog Output Circuit, Data Signal Line Driving Circuit, Display, and Potential Writing Method
审中-公开
模拟输出电路,数据信号线驱动电路,显示和电位写入方式
- 专利标题: Analog Output Circuit, Data Signal Line Driving Circuit, Display, and Potential Writing Method
- 专利标题(中): 模拟输出电路,数据信号线驱动电路,显示和电位写入方式
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申请号: US12226131申请日: 2007-02-13
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公开(公告)号: US20090174372A1公开(公告)日: 2009-07-09
- 发明人: Kazuhiro Maeda , Ichiro Shiraki , Shinsaku Shimizu , Shuji Nishi
- 申请人: Kazuhiro Maeda , Ichiro Shiraki , Shinsaku Shimizu , Shuji Nishi
- 优先权: JP2006-144717 20060524
- 国际申请: PCT/JP2007/052456 WO 20070213
- 主分类号: H02J7/00
- IPC分类号: H02J7/00 ; H02J3/00
摘要:
In one embodiment of the present invention, a voltage source is disclosed including a lower output impedance is connected to a capacitive load via a switch element and a voltage source including a higher output impedance is connected to the capacitive load via a switch element. Until a potential of an output terminal attains a reference potential, a comparator keeps the switch element in an ON state so that the voltage source writes a potential onto the capacitive load. When the potential of the output terminal exceeds the reference potential, the comparator causes the switch element to be in an ON state so that the voltage source writes a potential onto the capacitive load so as to have a predetermined potential.
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